1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and a control method of a semiconductor integrated circuit, and more particularly to a technique for reducing the power of a semiconductor integrated circuit having periodicity in processing such as image processing and audio processing.
2. Description of the Related Art
In recent years, semiconductor integrated circuits have been used in complex processing such as high definition image processing. Power consumption tends to increase the more complex the processing. Also, reduction of power consumption is also important from the aspect of heat resistance and reliability.
The power consumption of a semiconductor integrated circuit is divided between power consumption in a processing state and power consumption in a standby state. Of these, power consumption in the standby state is dependent on leakage current in a MOS transistor, for example. Leakage current is current that leaks into channels or places that are insulated when the MOS transistor is OFF.
Power gating is known as a technique for reducing power consumption in the standby state. Power gating is a technique for shutting down power supply to a functional block of circuitry that is non-operational in the standby state (hereinafter, “power shutdown”). A power switch transistor is provided between the power supply and the functional block to be power gated, and in the standby state the power switch transistor is turned OFF and power to the functional block to be power gated is shut down. As a result, the leakage current of that functional block is greatly reduced, and power consumption in the standby state is reduced.
However, with power gating, once power supply has been shut down, it takes time to activate the MOS transistor and return the circuitry to an operational state after power supply is restarted. While returning a MOS transistor constituting circuitry to an operational state takes several microseconds after power supply is applied, power needs to be supplied gradually so as to not affect the operation of peripheral circuitry. This recovery time depends on the method of supplying power to the functional blocks, the structure of the power switch and individual differences between semiconductors, and power gating needs to be applied after setting an appropriate duration. For this reason, conventionally power gating has only been used in relation to the standby state, in which it is known that the functional blocks will be out of use for long enough for the recovery time to not be an issue, and, moreover, in which processing will not be disrupted.
For example, with a mobile phone, functional blocks that are not used when waiting for a call such as functional blocks related to making a call can enter a standby state involving power shutdown. Such power supply control is implemented with system levels using register settings, dedicated commands, interrupts or the like as disclosed in Japanese Patent Laid-Open No. 2007-259463.
Also, as disclosed in Japanese Patent Laid-Open No. 2008-40543 or Japanese Patent Laid-Open No. 2008-72566, a method for detecting whether a transistor constituting circuitry is in an operational state by performing processing such as monitoring the voltage state or calculating the time required for recovery is adopted when performing power gating. This method enables timing control of power gating that takes recovery time into consideration.
On the other hand, in image processing and audio processing, signal standards have timing rules, and each standard is characterized by periodically repeating a processing state and an idle state in which processing is not performed. For example, in image processing, horizontal processing and vertical processing each involve repeating a processing state and an idle state periodically in accordance with the timing of a signal standard. Also, processing such as image partition processing and frame processing similarly has periodicity, and involves repeating a processing state and an idle state. Typically, the idle state is often shorter than the recovery time from a power shutdown state, and is not suitable for power shutdown even if the timing and duration of the idle state are predicable. Accordingly, a situation arises where power to circuitry is not shutdown even in the idle state, and power savings are not achieved when performing image processing.
In order to respond to such a situation, it is conceivable to shorten the recovery time by voltage reduction to a specific voltage rather than power shutdown. However, there is a problem in that when the voltage reduction duration is set so that the recovery time fits within the time interval of the shortest idle state in order to be compatible with various signal standards, the voltage cannot be sufficiently transformed, resulting in insufficient reduction in leakage current.